Bipolar, low bias current generator
Analysis
Transimpedance amplifier
Bias generator
This bias generator was designed as part of a low current bipolar semi-custom chip where the total current of the chip was 1ľA when running. While the circuit produces a current which nominally depends on absolute temperature (it is essentially a delta Vbe current generator), it nevertheless provides a very low current with very little wasted current and with relatively low total resistance.
The circuit uses a 2:3 ratio of emitters. Normally a bandgap reference would use quite a large emitter ratio for maximum accuracy, but the resistor size for a given current will be proportional to ln(ratio) so by keeping the ratio very low, the resistor size is minimised.
The current generated at each of the two collectors of Q6 is around 130nA. The total current used (i.e. not going through the collectors of Q6) is 240nA, so to generate two 130nA current sources the whole circuit takes only 500nA.
JC1 is a junction capacitor to ensure startup - the circuit is essentially bistable. The point labelled BIAS would normally be connected to VSS but in this case is also used to disable the bias generator and put the chip into a SHUTDOWN state from an external pin. When the BIAS point is later pulled to VSS this also ensures startup of the bias generator.
While this type of current generator is not normally covered in reference books, the delta Vbe principle is covered in the analysis of bandgap references. Bandgap references are in most IC design reference books, such as "Analysis and Design of Analog Integrated Circuits" by Gray & Meyer, first published in 1977, and the more recent "CMOS Circuit Design, Layout and Simulation" Second Edition by R. Jacob Baker ISBN 0-471-70055-X. The latter book concentrates more on CMOS implementations and is an excellent book covering a wide range of topics.
The circuit uses a 2:3 ratio of emitters. Normally a bandgap reference would use quite a large emitter ratio for maximum accuracy, but the resistor size for a given current will be proportional to ln(ratio) so by keeping the ratio very low, the resistor size is minimised.
The current generated at each of the two collectors of Q6 is around 130nA. The total current used (i.e. not going through the collectors of Q6) is 240nA, so to generate two 130nA current sources the whole circuit takes only 500nA.
JC1 is a junction capacitor to ensure startup - the circuit is essentially bistable. The point labelled BIAS would normally be connected to VSS but in this case is also used to disable the bias generator and put the chip into a SHUTDOWN state from an external pin. When the BIAS point is later pulled to VSS this also ensures startup of the bias generator.
While this type of current generator is not normally covered in reference books, the delta Vbe principle is covered in the analysis of bandgap references. Bandgap references are in most IC design reference books, such as "Analysis and Design of Analog Integrated Circuits" by Gray & Meyer, first published in 1977, and the more recent "CMOS Circuit Design, Layout and Simulation" Second Edition by R. Jacob Baker ISBN 0-471-70055-X. The latter book concentrates more on CMOS implementations and is an excellent book covering a wide range of topics.
CMOS comparator
Click on the image for a larger view of the schematic.